1. Field of the Invention
The present invention relates to an adhesive bonding technique used in semiconductor chip mounting.
2. Description of the Related Art
Thermosetting adhesive is commonly used for bonding a semiconductor chip on a substrate such as a flexible wiring board. FIG. 9 shows an electric device 101 composed of a substrate 113 and a semiconductor chip 111 bonded thereon with an adhesive 112.
Metal wiring 122 is arranged on the substrate 113 on a face opposite the chip 111. On the face of the chip 111 opposite the substrate 113, terminals 121 formed as bumps are arranged and abutted on the metal wiring 122 on the opposing substrate 113.
The chip's terminals 121 are connected to its internal circuit not shown in FIG. 9, so the internal circuit is electrically connected to the metal wiring 122 of the substrate 113 through the terminals 121 in the state shown in FIG. 9. The chip 111 and substrate 113 are mechanically connected each other, too, by the adhesive 112 which is cured by application of heat. Bonding of these two elements 111 and 113 is thus achieved by the adhesive 112 without solder.
In a prior art bonding step, the adhesive 112 is first applied or affixed on the surface of the substrate 113 under a normal temperature, after which the semiconductor chip 111 is pressed onto the adhesive 112 using a heated pressing head. One difficulty associated with this prior art technique is that air may be easily trapped during the application or attachment of the adhesive 112 or during the pressing of the chip 111 onto the adhesive 112, resulting in voids (air bubbles) 130 between the substrate 113 and the adhesive 112 or in the adhesive 112 between the terminals 121 of the chip 111. Voids 130 in the adhesive 112 may lead to peeling of the chip 111 or conductivity failure because of the heat applied to the electric device during, e.g., a reflow process.
Air trapping during application of the adhesive 112 can be reduced by lowering the viscosity of the adhesive 112 so as to increase the wettability between the adhesive 112 and the substrate 113 or the chip 111. Once air is trapped, however, it is difficult to remove during heating under pressure.
On the other hand, if the adhesive 112 has a high viscosity, air is more readily trapped but can be removed with ease during heating under pressure; nevertheless connection failure between terminals is likely to occur.
Japanese Patent Laid-Open Publication No. Hei 5-144873 shows a method whereby voids are reduced: A semiconductor chip 111 is pressed against adhesive 112 under a normal temperature using a pressing head, whose temperature is then raised stepwise or continuously to heat the adhesive 112. According to this method, because of the gradual temperature rise of the adhesive 112, it is less likely to generate voids 130. This method, however, has low productivity due to the long tact time (time required for one step of production), because continuous processing of several chips 111 is not possible with a single pressing head which needs to be temperature-controlled.
Another method reduces the tact time by separating the bonding process in two steps and using separate pressing heads; in an alignment step (temporary bonding step), the chips 111 are merely placed at preset locations on the adhesive 112 without applying heat. Only in a permanent bonding step is heat applied with pressure. While productivity is improved with this method, voids 130 are more likely to form. Neither method satisfied the need to produce reliable electric devices 101 in an efficient manner.